In recent studies, reversible logic has
emerged as a great scene of research, having applications in low power CMOS
circuits, optical computing, quantum computing and nanotechnology. The
classical logic gates such as AND, OR, EXOR and EXNOR are not reversible. In
the existing literature, reversible sequential circuits designs are offered
that are improved for the number of the garbage outputs and reversible gates.
Minimizing the number of garbage is very noticeable. In the present paper, we
show a design of the reversible comparator based on the quantum gates
implementation of the reversible DG gate. The reversible DG gate is designed by
using 3 × 3 quantum gates such as NOT, CNOT, Controlled-V and Controlled-V+
gates. Also, we have used the TR gate and various types of quantum gates in the
implementation results. Low power three-bit comparator is designed using DG
Gate, New Gate and Fredkin Gate. In order to evaluate the benefit of using the
DG gate proposed in this paper, one-bit comparator is constructed. The design
is useful for the future computing techniques like quantum computers. The
proposed designs are implemented using VHDL and functionally investigated using
Quartus II simulator.
Article by Jafar
Zare,et al,from Islamic Azad University, Sarvestan, Iran
Full access: http://mrw.so/qVOU3
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